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2.3GHz to 2.7GHz MIMO Wireless
BroadbandRF Transceiver
Bump Description
BUMP
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NAME
GNDRXLNA_A
V CCRXLNA_A
V CCRXLNA_B
GND_LNA_B
RXINB+
GND_MXR_B
B2
B3
B4
V CCTXPAD
GND1_PAD_RF
GND2_PAD_RF
PABIAS
GND_TXMX
SCLK
REFCLK
V CCXTAL
V CCCP
GNDCP
CPOUT+
GNDVCO
VCOBYP
V CCVCO
GND_LO
CS
GND_RXBB_B
RXBBIB+
RXBBQB+
B6
RXBBQA-
RXBBQA+
V CCRXVGA
GND_RXBB_A
FUNCTION
Receiver A LNA Ground
Receiver A LNA Supply Voltage. Bypass with a 22pF capacitor as close as possible to the pin.
Receiver B LNA Supply Voltage. Bypass with a 22pF capacitor as close as possible to the pin.
Receiver B LNA Ground
Receiver B LNA Differential Input Plus. Input is internally DC-coupled.
Receiver B Mixer Ground
Receiver and Transmitter Gain-Control Logic Input Bit 2
Receiver and Transmitter Gain-Control Logic Input Bit 3
Receiver and Transmitter Gain-Control Logic Input Bit 4
Supply Voltage for Transmitter Power Amplifier Driver. Bypass with a 22pF capacitor as close as
possible to the pin.
Transmit Power Amplifier Driver Ground
Transmit Power Amplifier Driver Ground
Transmit External Power Amplifier Bias DAC Output
Transmit Upconverter Ground
Serial-Clock Logic Input of 4-Wire Serial Interface
Reference Clock Input. AC-couple a reference clock to this analog input.
Crystal Oscillator Supply Voltage. Bypass with a 100nF capacitor as close as possible to the pin.
PLL Charge-Pump Supply Voltage. Bypass with a 100nF capacitor as close as possible to the pin.
Charge-Pump Ground
Differential Charge-Pump Output Plus. Connect the frequency synthesizer’s loop filter between
CPOUT+ and CPOUT- (see the Typical Operating Circuit ).
VCO Ground
On-Chip VCO Regulator Output Bypass. Bypass with a 1μF capacitor to GND. Do not connect other
circuitry to this point.
VCO Supply Voltage. Bypass with a 22nF capacitor as close as possible to the pin.
Local Oscillator Generation Ground
Active-Low Chip-Select Logic Input of 4-Wire Serial Interface
Receiver B Baseband Ground
Receiver B Baseband I-Channel Differential Output Plus
Receiver B Baseband Q-Channel Differential Output Plus
Receiver and Transmitter Gain-Control Logic Input Bit 6
Receiver A Baseband Q-Channel Differential Output Minus
Receiver A Baseband Q-Channel Differential Output Plus
Receiver VGA Supply Voltage. Bypass with a 100nF capacitor as close as possible to the pin.
Receiver A Baseband Ground
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GND_RXLOGEN Receiver Divide-by-2 Ground
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GND_MXR_A
GND_LNA_A
TXBBQ-
CLKOUT_DIV
Receiver A Mixer Ground
Receiver A LNA Ground
Transmitter Baseband Q-Channel Differential Input Minus
Clockout Divide Ratio Select Logic Input
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